MICROSOFT Fri May 10 13:22:55 CONFIDENTIAL 2013ĪP20 PEX_SOC_SPARE_TP AP21 PEX_SOC_SPARE_TNĪP23 PEX_SOC_ENET_TP AP24 PEX_SOC_ENET_TNĪU23 PEX_L1_SOC_SB_TP AU24 PEX_L1_SOC_SB_TNĪV25 PEX_L0_SOC_SB_TP AV26 PEX_L0_SOC_SB_TN
RULES: (APPLIED WHEN POSSIBLE) 1.) MSB TO LSB IS TOP TO BOTTOM 2.) WHEN POSSIBLE: INPUTS ON LEFT, OUTPUTS ON RIGHT 3.) ORDER OF PAGES=CHIP INTERFACES, TERMINATION, POWER, DECOUPLING 4.) AVOID USING OFF PAGE CONNECTORS FOR ON PAGE CONNECTIONS 5.) LANED SIGNALS ARE GROUPED ON SYMBOLS 6.) TRANSIMITTER NAME USED AS PREFIX WITH RX AND TX CONNECTIONS 7.) SUFFIX V_ IS USED FOR VOLTAGE RAIL SIGNAL NAMES 8.) SUFFIX _DP AND _DN ARE USED FOR DIFFERIENTAL PAIRS 9.) UNNAMED NETS ARE NAMED WITH /2 TEXT SIZE 10.) SUFFIX _N FOR ACTIVE LOW OR N JUNCTION 12.) SUFFIX _P FOR P JUNCTION 13.) SUFFIX _EN FOR ENABLE 14.) 'CLK' FOR CLOCKS, 'RST' FOR RESETS 15.) PWRGD FOR POWER GOOD 16.) REV AND FAB ARE SET USING CUSTOM VARIABLES TOOLS>OPTIONS>VARIABLES
CONTENTS COVER PAGE SOC, PCIEX + CLOCKS + VIDEO SOC POWER, MEM+CPUCORE+MEMCORE+NBCORE+MISC SOC POWER, V_GFXCORE + VSS SOC, MEMOERY PARTITION C + D SOC, MEMORY PARTITION A + B SOC, VSS + SPARE SOC, DEBUG + SB SIGNALS SOC, DECOUPLING SOC, DECOUPLING SOC, DECOUPLING MEMORY CHANNEL D MEMORY CHANNEL D MEMORY CHANNEL D, DECOUPLING MEMORY CHANNEL C MEMORY CHANNEL C MEMORY CHANNEL C, DECOUPLING MEMORY CHANNEL B MEMORY CHANNEL B MEMORY CHANNEL B, DECOUPLING MEMORY CHANNEL A MEMORY CHANNEL A MEMORY CHANNEL A, DECOUPLING KIC, USB KIC, PCIEX + SATA + VIDEO KIC, SMC KIC, FACET KIC, POWER KIC, CLOCKS + STRAPPING + POR KIC, POWER KIC, DECOUPLING CONTROLLER, ETHERNET EMMC CONN, RJ45 + TOSLINK CONN, USB CONN, USB CONN, HDMI INĥ ĬONN, HDMI OUT CONN, ODD + HDD CONN, LITHIUM + FAN CONN, PWR VREGS, BLEEDERS VREGS, INPUT + OUTPUT FILTERS VREGS, CPUCORE VREGS, GFXCORE VREGS, GFXCORE OUTPUT PHASE 1 & 2 VREGS, GFXCORE OUTPUT PHASE 3 & 4 VREGS, CPUCORE OUTPUT PHASE VREGS, VTT TERMINATION VREGS, NBCORE VREGS, MEMCORE VREGS, MEMIOCD VREGS, MEMIOAB VREGS, V5P0 VREGS, V5P0 DUAL VREGS, V3P3 VREGS, VSOCPHY VREGS, VSOCPLL + VBURN + VFUSE + VBAT VREGS, VSB2P5 VREGS, VSB1P8PLL + VSB1P8IO + VSBCORE + VSB1P1PLL VREGS, STANDBY SWITCHERS 3P3 VREGS, STANDBY SWITCHERS 1P1 + 1P8 IR BLASTER I2C FACET, FTDI FACET, FTDI + MISC CONN, SWITCHES CONN, HDT DEBUG, VR HEADERS AND TEST POINTS DEBUG, CONNECTORS DEBUG, ENET EEPROM + MISC LABELS AND MOUNTING
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